The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure. Unless otherwise indicated herein, the approaches described in this section are not prior art to the claims in the present disclosure and are not admitted to be prior art by inclusion in this section.
Cross point non-volatile memory, including phase-change memory (PCM), may consist of a two- or three-dimensional grid of memory cells. Systems using PCM may construct a memory address as a combination of multiple memory cells from one or more memory arrays. Memory cell state may be represented by a voltage threshold, which may be notated as VT. In some PCM, the voltage value of each cell may be settable to one of two voltage thresholds, which may represent a logical “0” or “1,” respectively. The voltage value of a memory cell may be positioned by a write operation and read by a read operation. In some cases, the physical mechanisms behind the read and write operations on a given memory cell or memory address may cause one or more other memory cells or memory addresses to lose the data stored in them or otherwise get disturbed.